Digital Design and Verification Engineer (IP)
Onsemi
Brno, CZ, Czech Republic
před 4 dny

Job Description - Digital Design and Verification Engineer (IP) (2204670)

Job Description

Digital Design and Verification Engineer (IP)-(2204670)

Description

onsemi s Central IP division is responsible for the design, verification, integration and support of reusable intellectual property (IP) that then facilitates custom ASIC and ASSP development.

Currently, we have an opening for a digital design and verification engineer to join the IP team in Brno, Czech Republic.

We are searching for senior candidates but will also consider highly motivated juniors.

Responsibilities

  • digital design and verification of IP blocks and / or integrated circuits
  • programming of scripts for development of digital IP blocks
  • Qualifications

  • HDL languages any of Verilog, System Verilog or VHDL
  • experience with FPGA, ASIC or ASSP development flow
  • programming skills Perl or Python, Tcl and / or object oriented programming is a plus
  • written and verbal communication skills in English (technical topics)
  • university degree in Electrical Engineering or Information Technology
  • open mind with willingness to learn and apply new skills and concepts
  • knowledge of functional verification concepts and UVM is a plus
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